Harryzhu
Guest
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 Posted:
Tue Oct 25, 2005 12:10 pm Post subject:
Why the size of mos's w & l checked is wrong when I run lvs |
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Hello everyone,
I defined one nmos device in nwell as MM in dracula lvs rule file, which
used as capacitance, I check the result and find the device can be
recognised but the size is wrong, device's width is doubled and length is
halved and the whold area is right. What is the reason? I checked and modify
for one afternoon but have no more progress.
I describe my thinking as below:
Firstly I check out the ndiff overlap with nwell and get nwndf, and
then select the poly overlap with nwndf and then run 'AND' to get the
recognized layer, the poly and S/D are the same with normal nmos transistor,
the underlay is same with normal pmos transistor and named as nweld.
select ndiff overlap nwell nwndf
select poly overlap nwndf ponwdf
and ponwdf nwndf ngatec
not nwndf ngatec nsd
not ngate1 ngatec ngate ;ngate1 is the defined recognized layer of
normal nmos transistor
...
element MOS[MM] ngatec polyG nsd nweld ;nweld=nwell - nwell resistor;
Who may give me more advice? thanks for your help!
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Andrew Beckett
Guest
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| Posted:
Mon Oct 31, 2005 1:10 am Post subject:
Re: Why the size of mos's w & l checked is wrong when I run |
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On Tue, 25 Oct 2005 19:19:49 +0800, "Harryzhu" <harrytone@sohu.com> wrote:
| Quote: | Hello everyone,
I defined one nmos device in nwell as MM in dracula lvs rule file, which
used as capacitance, I check the result and find the device can be
recognised but the size is wrong, device's width is doubled and length is
halved and the whold area is right. What is the reason? I checked and modify
for one afternoon but have no more progress.
I describe my thinking as below:
Firstly I check out the ndiff overlap with nwell and get nwndf, and
then select the poly overlap with nwndf and then run 'AND' to get the
recognized layer, the poly and S/D are the same with normal nmos transistor,
the underlay is same with normal pmos transistor and named as nweld.
select ndiff overlap nwell nwndf
select poly overlap nwndf ponwdf
and ponwdf nwndf ngatec
not nwndf ngatec nsd
not ngate1 ngatec ngate ;ngate1 is the defined recognized layer of
normal nmos transistor
...
element MOS[MM] ngatec polyG nsd nweld ;nweld=nwell - nwell resistor;
Who may give me more advice? thanks for your help!
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Nothing obvious from what you've described, but without seeing the whole example
it's hard to be sure. There's almost certainly a good reason for this, but
you're probably looking in the wrong place! Your description doesn't reveal
what's wrong, but that's not surprising because you'd have probably spotted the
problem if it did!
Regards,
Andrew. |
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