DRAM and EMC
CADForums.net Forum Index CADForums.net
Discussion of AutoCAD and other CAD software.
 
 FAQFAQ   MemberlistMemberlist     RegisterRegister 
 ProfileProfile   Log in to check your private messagesLog in to check your private messages   Log inLog in 
 
Google
 
Web cadforums.net
DRAM and EMC

 
Post new topic   Reply to topic    CADForums.net Forum Index -> Cadence
Author Message
ricky
Guest





Posted: Fri Oct 22, 2004 11:49 pm    Post subject: DRAM and EMC Reply with quote

Hi,

I just want to ask that we have a highly critical EMC compliant system. We
need to make a choice between SRAM or DRAM in this. So, my question is,
which one of these is less sensitive to EMI (better suited for EMC critical
applications).

Thanks in advance.
ricky

Back to top
G Vandevalk
Guest





Posted: Sat Oct 23, 2004 7:30 pm    Post subject: Re: DRAM and EMC Reply with quote

Ricky:

Typically:

DRAM's are 1 Capacitor & 1 Access Transistor.
Leakage will cause the Capacitor to loose charge, and will need to be
refreshed after a set amount of time.

SRAM's are cross coupled transistors that retain the charge state through
feedback. Usually transistors.

Usually SRAM's are much more immune to EMI events than comparable technology
DRAM's
Note that both circuit types can be made more immune to EMI at the cost of
size or power.

YMMV
-- Gerry


"ricky" <ricky_100@yahoo.com> wrote in message
news:clbo8u$sb7$1@reader13.wxs.nl...
Quote:
Hi,

I just want to ask that we have a highly critical EMC compliant system. We
need to make a choice between SRAM or DRAM in this. So, my question is,
which one of these is less sensitive to EMI (better suited for EMC
critical
applications).

Thanks in advance.
ricky

Back to top
David R Brooks
Guest





Posted: Sun Oct 24, 2004 5:36 am    Post subject: Re: DRAM and EMC Reply with quote

Traditionally, this was correct (SRAM better than DRAM).
Current designs are starting to change the balance, as SRAM cells keep
getting smaller & so less gate capacitance (read, less "hit" energy
required to flip the bit), while DRAM cells get all the capacitance
the process can give, to extend the refresh time.
A partial disturb is remedied at once in SRAM, byt the normal flipflop
regeneration. In DRAM, it must wait for the next refresh.

"G Vandevalk" <vdvalk@rogers.com> wrote:

:Ricky:
:
:Typically:
:
:DRAM's are 1 Capacitor & 1 Access Transistor.
:Leakage will cause the Capacitor to loose charge, and will need to be
:refreshed after a set amount of time.
:
:SRAM's are cross coupled transistors that retain the charge state through
:feedback. Usually transistors.
:
:Usually SRAM's are much more immune to EMI events than comparable technology
:DRAM's
:Note that both circuit types can be made more immune to EMI at the cost of
:size or power.
:
:YMMV
:-- Gerry
:
:
:"ricky" <ricky_100@yahoo.com> wrote in message
:news:clbo8u$sb7$1@reader13.wxs.nl...
:> Hi,
:>
:> I just want to ask that we have a highly critical EMC compliant system. We
:> need to make a choice between SRAM or DRAM in this. So, my question is,
:> which one of these is less sensitive to EMI (better suited for EMC
:critical
:> applications).
:>
:> Thanks in advance.
:> ricky
:>
:>
:

Back to top
 
Post new topic   Reply to topic    CADForums.net Forum Index -> Cadence All times are GMT
Page 1 of 1

 
You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum




Windows Server DSP VoIP Electronics New Topics
Powered by phpBB