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Manivannan
Guest
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Posted:
Tue Aug 24, 2004 6:41 am Post subject:
runnig vhdl-ams |
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Hai ,
I am new to this group and to Cadence,
My question is: is there a way to run vhdl-ams code in Cadence?
I have run vhdl and tried verilog-ams on Cadence.
For now i am using a student version of System Vision provided by
Mentor Graphics, but since my University has a licensed version of
Cadence, i was just wondering if i can port my codes to Cadence.
I will be happy if somebody could suggest me a way if one exists.
Thanks
Manivannan
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Andrew Beckett
Guest
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Posted:
Tue Aug 24, 2004 1:01 pm Post subject:
Re: runnig vhdl-ams |
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The tool is AMS Designer.
There are a number of previous threads on this - you might want to check
on google to get more information, or you could (if all else fails) read the
manual.
Andrew.
On 23 Aug 2004 19:41:13 -0700, manivannanbhoopathy@yahoo.com (Manivannan) wrote:
| Quote: | Hai ,
I am new to this group and to Cadence,
My question is: is there a way to run vhdl-ams code in Cadence?
I have run vhdl and tried verilog-ams on Cadence.
For now i am using a student version of System Vision provided by
Mentor Graphics, but since my University has a licensed version of
Cadence, i was just wondering if i can port my codes to Cadence.
I will be happy if somebody could suggest me a way if one exists.
Thanks
Manivannan
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--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd |
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Rajeswaran M
Guest
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Posted:
Wed Aug 25, 2004 1:21 pm Post subject:
Re: runnig vhdl-ams |
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I am getting the following error when I try to netlist using VHDL tool
box,
vhdlNet: *E,349: Unable to netlist VHDL file
/user/test/cds446/bhas/TOP_CELL/entity/vhdl.vhd because it failed VHDL
compilation.
Please clean up the syntax errors before trying again.
vhdlNet: *E,346: Entity creation from pinList file 'TOP_CELL' is aborted
due to previous errors.
The error is coming to even for a simple block. Do I miss any setups?
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Andrew Beckett
Guest
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Posted:
Wed Aug 25, 2004 3:03 pm Post subject:
Re: runnig vhdl-ams |
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Is this for VHDL-AMS? (since you replied to that thread). VHDL-AMS views cannot
be used in VHDL toolbox - that's just for pure VHDL (no AMS).
Andrew.
On Wed, 25 Aug 2004 14:39:24 +0530, Rajeswaran M <m_rajeswaran@yahoo.com> wrote:
| Quote: | I am getting the following error when I try to netlist using VHDL tool
box,
vhdlNet: *E,349: Unable to netlist VHDL file
/user/test/cds446/bhas/TOP_CELL/entity/vhdl.vhd because it failed VHDL
compilation.
Please clean up the syntax errors before trying again.
vhdlNet: *E,346: Entity creation from pinList file 'TOP_CELL' is aborted
due to previous errors.
The error is coming to even for a simple block. Do I miss any setups?
|
--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd |
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| Back to top |
|
 |
Rajeswaran M
Guest
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Posted:
Thu Aug 26, 2004 8:53 am Post subject:
Re: runnig vhdl-ams |
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sorry for the post in wrong thread.
Its just pure VHDL flow. customer support, had provided solution for the
issue. I was missing CDS_VHDL environment.
Thanks!!
Andrew Beckett wrote:
| Quote: | Is this for VHDL-AMS? (since you replied to that thread). VHDL-AMS views cannot
be used in VHDL toolbox - that's just for pure VHDL (no AMS).
Andrew.
On Wed, 25 Aug 2004 14:39:24 +0530, Rajeswaran M <m_rajeswaran@yahoo.com> wrote:
I am getting the following error when I try to netlist using VHDL tool
box,
vhdlNet: *E,349: Unable to netlist VHDL file
/user/test/cds446/bhas/TOP_CELL/entity/vhdl.vhd because it failed VHDL
compilation.
Please clean up the syntax errors before trying again.
vhdlNet: *E,346: Entity creation from pinList file 'TOP_CELL' is aborted
due to previous errors.
The error is coming to even for a simple block. Do I miss any setups?
--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd |
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