John O'Donovan
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Posted:
Thu Nov 17, 2005 9:10 pm Post subject:
Re: simulating with ahdl code on Cadence IC 5.1.41.usr2 |
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As Andrew said the -E option just causes cpp to be called on the
netlist before Spectre actually parses it. On Linux, cpp is called as
follows,
/lib/cpp -traditional -$ ...
On my systems, which have GCC 2.96 and 3.2.3 installed -$ is a valid
option to cpp. Maybe you have a different version of cpp installed in
/lib/cpp. Use /lib/cpp --version to find the version.
With regard to performance and comparing the new Spectre parser with
the old (-csfe), the actual parser itself should always be faster.
Neither parser caches data between runs , so that is not the source of
the problem. Have you tried to disable the compilation of Verilog-A.
For small circuits this can easily dominate.
Best Regards,
John
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fogh
Guest
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Posted:
Thu Nov 17, 2005 9:10 pm Post subject:
Re: simulating with ahdl code on Cadence IC 5.1.41.usr2 |
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John O'Donovan wrote:
| Quote: | As Andrew said the -E option just causes cpp to be called on the
netlist before Spectre actually parses it. On Linux, cpp is called as
follows,
/lib/cpp -traditional -$ ...
On my systems, which have GCC 2.96 and 3.2.3 installed -$ is a valid
option to cpp. Maybe you have a different version of cpp installed in
/lib/cpp. Use /lib/cpp --version to find the version.
With regard to performance and comparing the new Spectre parser with
the old (-csfe), the actual parser itself should always be faster.
I think that the new parser (at least in older-than-last-august |
versions) is slower in practise only because it parses everything, even
the sections of the .scs not selected.
| Quote: | Neither parser caches data between runs , so that is not the source of
the problem. Have you tried to disable the compilation of Verilog-A.
For small circuits this can easily dominate.
Caching is not the problem, it is a possible solution for better |
performance that I was proposing. But never mind, cadence R&D knows
their business and they can probably come up with many different
solutions to improve the parser performance.
I ll just make an SR if I find this performance problem also in recent
MMSIM. |
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