| Author |
Message |
JC
Guest
|
 Posted:
Fri Oct 28, 2005 12:10 am Post subject:
Help! Bus notation on schematics |
|
|
Hi,
Using the Cadence schematic tool, I have a cell instantiated 128 times,
Icell1<127:0>.
I want groups of 4 cells at the time to have the same input, so there will
be 32 signals, x<31:0> going to 128 cells.
I can label the bus to the input
etc., x<1>, x<1>, x<1>, x<1>, x<0>, x<0>, x<0>, x<0>
but it is a very long string.
What is the syntax to abbreviate it, such as
etc., ((x<1>) *4), ((x<0>) *4)
or something even shorter such as
bit=0; (((x<bit + 1>) *4) *32)
Thanks,
Joe
joe.clark@nospm@adtran.com
|
|
| Back to top |
|
 |
Bernd Fischer
Guest
|
| Posted:
Fri Oct 28, 2005 12:10 pm Post subject:
Re: Help! Bus notation on schematics |
|
|
Virtuoso Schematic Editor User Guide,
Section: Multiple-Bit Wire Connections
Section: Wire-to-Iterated Instance Connections
Section: Multiple-Bit Wire Naming Conventions
Bernd
JC wrote:
| Quote: | Hi,
Using the Cadence schematic tool, I have a cell instantiated 128 times,
Icell1<127:0>.
I want groups of 4 cells at the time to have the same input, so there will
be 32 signals, x<31:0> going to 128 cells.
I can label the bus to the input
etc., x<1>, x<1>, x<1>, x<1>, x<0>, x<0>, x<0>, x<0
but it is a very long string.
What is the syntax to abbreviate it, such as
etc., ((x<1>) *4), ((x<0>) *4)
or something even shorter such as
bit=0; (((x<bit + 1>) *4) *32)
Thanks,
Joe
joe.clark@nospm@adtran.com
|
|
|
| Back to top |
|
|
Gerry Vandevalk
Guest
|
| Posted:
Tue Nov 01, 2005 8:33 am Post subject:
Re: Help! Bus notation on schematics |
|
|
All:
I defy anyone at Cadence to tell me exactly how bus ripping works.
The documents below describe a subset legal bus definitions that work, but
other esoteric combinations work.
The custom memory group at my ex-employer used some pretty wild combinations
that worked.
As a matter of fact, they would write bus def's just like you describe them
( something like <4*i<31:0>> and they would get the bus you describe .. )
I will ask former member of the group for the syntax he uses and post it!
-- Gerry
"Bernd Fischer" <""bernd.fischer\"@xignal-A%&HY%$v#&G=.de"> wrote in message
news:3se81dFnsi5dU1@individual.net...
| Quote: | Virtuoso Schematic Editor User Guide,
Section: Multiple-Bit Wire Connections
Section: Wire-to-Iterated Instance Connections
Section: Multiple-Bit Wire Naming Conventions
Bernd
JC wrote:
Hi,
Using the Cadence schematic tool, I have a cell instantiated 128 times,
Icell1<127:0>.
I want groups of 4 cells at the time to have the same input, so there
will be 32 signals, x<31:0> going to 128 cells.
I can label the bus to the input
etc., x<1>, x<1>, x<1>, x<1>, x<0>, x<0>, x<0>, x<0
but it is a very long string.
What is the syntax to abbreviate it, such as
etc., ((x<1>) *4), ((x<0>) *4)
or something even shorter such as
bit=0; (((x<bit + 1>) *4) *32)
Thanks,
Joe
joe.clark@nospm@adtran.com
|
|
|
| Back to top |
|
|
Andrew Beckett
Guest
|
| Posted:
Thu Nov 10, 2005 1:10 am Post subject:
Re: Help! Bus notation on schematics |
|
|
Oh, it's really not as complicated as all that! Starting with the one
that is wanted, here's a variety of examples of varying complexity (the
examples are followed with an representation of the sequence they
expand to).
Put simply - 0:n*m repeats each bit m times, whereas (0:n)*m repeats
the whole 0:n range m times one after the other. Then you can concatenate
them too, and further group them with parentheses, and so on.
x<0:31*4>
0,0,0,0,1,1,1,1,2,2,2,2....,31,31,31,31
x<(0:31)*4>
0,1,2,3,4,5,6,...31,0,1,2,3,4,5,6,...31,...
x<(0:31*2)*2>
0,0,1,1,2,2,3,3,...,31,31,0,0,1,1,2,2,3,3,...,31,31
x<0:31*2,31:0*2>
0,0,1,1,2,2,3,3,...,31,31,31,31,30,30,29,29,...,2,2,1,1,0,0
x<(0:31,31:0)*2>
0,1,2,3,4,...,31,31,30,29,...,2,1,0,0,1,2,3,4,...,31,31,30,29,...,2,1,0
Regards,
Andrew.
On Mon, 31 Oct 2005 21:33:38 -0500, "Gerry Vandevalk" <g_vandevalk@yahoo.com>
wrote:
| Quote: | All:
I defy anyone at Cadence to tell me exactly how bus ripping works.
The documents below describe a subset legal bus definitions that work, but
other esoteric combinations work.
The custom memory group at my ex-employer used some pretty wild combinations
that worked.
As a matter of fact, they would write bus def's just like you describe them
( something like <4*i<31:0>> and they would get the bus you describe .. )
I will ask former member of the group for the syntax he uses and post it!
-- Gerry
"Bernd Fischer" <""bernd.fischer\"@xignal-A%&HY%$v#&G=.de"> wrote in message
news:3se81dFnsi5dU1@individual.net...
Virtuoso Schematic Editor User Guide,
Section: Multiple-Bit Wire Connections
Section: Wire-to-Iterated Instance Connections
Section: Multiple-Bit Wire Naming Conventions
Bernd
JC wrote:
Hi,
Using the Cadence schematic tool, I have a cell instantiated 128 times,
Icell1<127:0>.
I want groups of 4 cells at the time to have the same input, so there
will be 32 signals, x<31:0> going to 128 cells.
I can label the bus to the input
etc., x<1>, x<1>, x<1>, x<1>, x<0>, x<0>, x<0>, x<0
but it is a very long string.
What is the syntax to abbreviate it, such as
etc., ((x<1>) *4), ((x<0>) *4)
or something even shorter such as
bit=0; (((x<bit + 1>) *4) *32)
Thanks,
Joe
joe.clark@nospm@adtran.com
|
|
|
| Back to top |
|
|
Gerry Vandevalk
Guest
|
| Posted:
Mon Nov 14, 2005 1:10 am Post subject:
Re: Help! Bus notation on schematics |
|
|
Yes it can be easy, but you can nest them in complex ways and they still
work.
(negative counting works too in x<31:0> arrays or more complex like
y<31:0:-2> (i think!) )
by the way ... don't you mean
x<0:31>*4
expands to
x<0>,x<0>,x<0>,x<0>,x<1>,x<1>, ... ,x<31>,x<31>
etc.
-- Gerry
"Andrew Beckett" <andrewb@DcEaLdEeTnEcTe.HcIoSm> wrote in message
news:hkt4n156ucsjit4plg4ojnfp376b60po3d@4ax.com...
| Quote: | Oh, it's really not as complicated as all that! Starting with the one
that is wanted, here's a variety of examples of varying complexity (the
examples are followed with an representation of the sequence they
expand to).
Put simply - 0:n*m repeats each bit m times, whereas (0:n)*m repeats
the whole 0:n range m times one after the other. Then you can concatenate
them too, and further group them with parentheses, and so on.
x<0:31*4
0,0,0,0,1,1,1,1,2,2,2,2....,31,31,31,31
x<(0:31)*4
0,1,2,3,4,5,6,...31,0,1,2,3,4,5,6,...31,...
x<(0:31*2)*2
0,0,1,1,2,2,3,3,...,31,31,0,0,1,1,2,2,3,3,...,31,31
x<0:31*2,31:0*2
0,0,1,1,2,2,3,3,...,31,31,31,31,30,30,29,29,...,2,2,1,1,0,0
x<(0:31,31:0)*2
0,1,2,3,4,...,31,31,30,29,...,2,1,0,0,1,2,3,4,...,31,31,30,29,...,2,1,0
Regards,
Andrew.
On Mon, 31 Oct 2005 21:33:38 -0500, "Gerry Vandevalk"
g_vandevalk@yahoo.com
wrote:
All:
I defy anyone at Cadence to tell me exactly how bus ripping works.
The documents below describe a subset legal bus definitions that work, but
other esoteric combinations work.
The custom memory group at my ex-employer used some pretty wild
combinations
that worked.
As a matter of fact, they would write bus def's just like you describe
them
( something like <4*i<31:0>> and they would get the bus you describe .. )
I will ask former member of the group for the syntax he uses and post it!
-- Gerry
"Bernd Fischer" <""bernd.fischer\"@xignal-A%&HY%$v#&G=.de"> wrote in
message
news:3se81dFnsi5dU1@individual.net...
Virtuoso Schematic Editor User Guide,
Section: Multiple-Bit Wire Connections
Section: Wire-to-Iterated Instance Connections
Section: Multiple-Bit Wire Naming Conventions
Bernd
JC wrote:
Hi,
Using the Cadence schematic tool, I have a cell instantiated 128 times,
Icell1<127:0>.
I want groups of 4 cells at the time to have the same input, so there
will be 32 signals, x<31:0> going to 128 cells.
I can label the bus to the input
etc., x<1>, x<1>, x<1>, x<1>, x<0>, x<0>, x<0>, x<0
but it is a very long string.
What is the syntax to abbreviate it, such as
etc., ((x<1>) *4), ((x<0>) *4)
or something even shorter such as
bit=0; (((x<bit + 1>) *4) *32)
Thanks,
Joe
joe.clark@nospm@adtran.com
|
|
|
| Back to top |
|
|
Roger Light
Guest
|
| Posted:
Mon Nov 14, 2005 1:10 pm Post subject:
Re: Help! Bus notation on schematics |
|
|
Roger Light wrote:
| Quote: | Is it possible to have the naming skip a wire? So if the bus wires I
want to name are every other wire? Something like:
a<0> b<0> a<1> b<1> a<2> b<2
|
Answering my own question, as long as the bus is named elsewhere, I can
leave out the net tap *name* and just use the index:
<0> <0> <1> <1> <2> <2>
From comphelp.pdf section "Tapping Wire Intersections by Name".
Thanks,
Roger |
|
| Back to top |
|
|
Roger Light
Guest
|
| Posted:
Mon Nov 14, 2005 1:10 pm Post subject:
Re: Help! Bus notation on schematics |
|
|
Andrew Beckett wrote:
| Quote: | Put simply - 0:n*m repeats each bit m times, whereas (0:n)*m repeats
the whole 0:n range m times one after the other. Then you can concatenate
them too, and further group them with parentheses, and so on.
|
Man, that was useful. I've always used <0:31> with expansion, but had no
idea it was that powerful. Thank you!
Is it possible to have the naming skip a wire? So if the bus wires I
want to name are every other wire? Something like:
a<0> b<0> a<1> b<1> a<2> b<2>
Or is naming this possible all in one go?
Most of the reason for me wanting to do that is solved by iterated
instances anyway - I didn't know about them either. I guess I should
read more of the documentation, but there is just so much to get through.
Thanks again,
Roger |
|
| Back to top |
|
|
Joe Clark
Guest
|
| Posted:
Tue Nov 15, 2005 5:10 pm Post subject:
Re: Help! Bus notation on schematics |
|
|
Thanks for the answers and ideas, guys.
Joe
"JC" <no@spam.com> wrote in message
news:adbdd$43616149$d0fb9763$31862@API-DIGITAL.COM...
| Quote: | Hi,
Using the Cadence schematic tool, I have a cell instantiated 128 times,
Icell1<127:0>.
I want groups of 4 cells at the time to have the same input, so there will
be 32 signals, x<31:0> going to 128 cells.
I can label the bus to the input
etc., x<1>, x<1>, x<1>, x<1>, x<0>, x<0>, x<0>, x<0
but it is a very long string.
What is the syntax to abbreviate it, such as
etc., ((x<1>) *4), ((x<0>) *4)
or something even shorter such as
bit=0; (((x<bit + 1>) *4) *32)
Thanks,
Joe
joe.clark@nospm@adtran.com
|
|
|
| Back to top |
|
|
|
|
|
|
FAQ
Memberlist
Register
Profile
Log in to check your private messages
Log in